Ruisheng's Photo

Ruisheng Wang

Ph.D. Candidate
Department of Electrical Engineering
University of Southern California

3740 McClintok Avenue, EEB 224
Los Angeles, CA 90089-2562

ruishenw at usc dot edu

I am a Ph.D. Candidate in Department of Electrical Engineering, at University of Southern California, working with both Professor Timothy Mark Pinkston and Professor Murali Annavaram in the area of Computer Architecture.

Research Interests


Current Interests: Cache Capacity and Memory Bandwidth Management in Chip Multiprocessors, Interconnection Network Design

Previous Interests: High Performance Router Design (Switch Architecture and Packet Scheduler)

Publications


Journal paper

JPDC'12
Efficient Implementation of Globally-aware Network Flow Control
Lizhong Chen, Ruisheng Wang and Timothy Mark Pinkston
in Journal of Parallel and Distributed Computing (JPDC), volume 72, issue 11, November 2012
doi:10.1016/j.jpdc.2012.02.004

Conference Papers

MICRO'14
Futility Scaling: High-Associativity Cache Partitioning
Ruisheng Wang and Lizhong Chen
in Proceedings of the 47th IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2014
doi:10.1109/MICRO.2014.46
HPCA'13
MP3: Minimizing Performance Penalty for Power-gating of Clos Network-on-Chip
Lizhong Chen, Lihang Zhao, Ruisheng Wang and Timothy Mark Pinkston
in Proceedings of the 20th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2014
doi:10.1109/HPCA.2014.6835940
ICS'13
Bubble Coloring: Avoiding Routing- and Protocol-induced Deadlocks with Minimal Virtual Channel Requirement
Ruisheng Wang, Lizhong Chen and Timothy Mark Pinkston
in Proceedings of the 27th International Conference on Supercomputing (ICS), June 2013
doi:10.1145/2464996.2465436
IPDPS'13
An Analytical Performance Model for Partitioning Off-Chip Memory Bandwidth
Ruisheng Wang, Lizhong Chen and Timothy Mark Pinkston
in Proceedings of the 27th IEEE International Parallel & Distributed Processing Symposium (IPDPS) June 2013
doi:10.1109/IPDPS.2011.63
IPDPS'11
Critical Bubble Scheme: An Efficient Implementation of Globally-aware Network Flow Control
Ruisheng Wang, Lizhong Chen and Timothy Mark Pinkston
in Proceedings of the 25th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2011
doi:10.1109/IPDPS.2013.85
NoCArc'10
Thread Criticality Support in On-Chip Networks
Yuho Jin, Ruisheng Wang, Woojin Choi and Timothy Mark Pinkston
in Proceedings of Third International Workshop on Network on Chip Architectures (NoCArc 2010), held in conjunction with the 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-43)
doi:10.1145/1921249.1921253
IWQoS'09
HOBRP: A Hardware Optimized Packet Scheduler that Provides Tunable End-to-end Delay Bound
Ruisheng Wang Youjian Zhao, Hongtao Guan and Guanghui Yang
in Proceedings of 17th IEEE International Workshop on Quality of Service (IWQoS), July 2009
doi:10.1109/IWQoS.2009.5201397
ICOIN'09
Achieving 100% Throughput in a Two-stage Multicast Switch
Ruisheng Wang Youjian Zhao and Ting Zhou
in Proceedings of 23rd International Conference on Information Networking (ICOIN), January 2009 IEEExplore

Technical Report

Ruisheng Wang and Lizhong Chen, "Futility Scaling: High-Associativity Cache Partitioning (extended version)", University of Southern California, Technical Report CENG-2014-07, 2014. (pdf)

Experiences


University of Southern California, USA Ericsson, San Jose, USA Computer Network and Protocol Testing Laboratory at Tsinghua University, Beijing, China