Ren Chen
Ph.D of Electrical Engineering, University of Southern California
Parallel Computing, Graph Analytics, Machine Learning

About Me

I am now a Senior Staff Data Engineer at Huawei America Research Center. Currently, my research focus is on graph analytics and computing, large scale machine learning and graph analytic system.

Before joining Huawei, I received my Ph.D degree in the Ming Hsieh Department of Electrical Engineering at University of Southern California (USC). I was a member of FPGA/Parallel Computing group supervised by Professor Viktor K. Prasanna. My research focus is to develop innovative parallel algorithms for big data applications and signal processing algorithms on FPGA and has published several full papers on ACM/SIGDA Design Automation Conference (DAC), IEEE Conference on Field Programmable Logic and Applications (FPL), ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA) and IEEE Conference on Field-Programmable Custom Computing Machines (FCCM).

I serve as the Proceeding Chair for High Perfomrnace Computing, Data and Analytics (HiPC) 2015 and HiPC 2016. I am paper reviewer for ACM Conference on Knowledge Discovery and Data Mining (KDD), IEEE Conference on Distributed Computing Systems (ICDCS), IEEE Conference on Field-Programmable Custom Computing Machines (FCCM), IEEE Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE Conference on High Performance Extreme Computing (HPEC), IEEE Conference on Field Programmable Logic and Applications (FPL), and ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), and IEEE Conference on ParaFPGA.

I have been invited to be journal reviewer for IEEE Transaction on Computer Architecture Letter, IEEE Transactions on Circuits and Systems I (Impact Factor: 2.393), IEEE Transactions on Computers (Impact Factor: 1.723), Journal of System Architecture (Impact Factor: 0.683), Journal of Supercomputing (Impact Factor: 1.088), and Transactions on Computer-Aided Design of Integrated Circuits and Systems (Impact Factor: 1.181).

*I am glad to serve as a reviewer for journal or conference papers, as well as a TPC member for conference or workshop, in the area of FPGA Computing, Signal Processing, VLSI, Database, Deep Learning, Machine Learning, Graph Analytics and Computing, Big Data Analytics and System, etc. Please feel free to contact me through email: renchen AT

Recent News

[Feb 2017] Our paper "Optimal Circuits for Parallel Bit Reversal" was accepted by Design Automation Conference 2017

[Feb 2017] I joined Huawei America Research Lab as a Senior Staff Data Engineer

[Dec 2016] Ph.D Dissertation Defended "Title: Optimal Designs for High Throughput Stream Processing using Universal RAM-based Permutation Network"

[Dec 2016] Received master degree in the Department of Computer Science at University of Southern California

[Aug 2016] Our paper "Optimal Dynamic Data Layouts for 2D FFT on 3D Memory Integrated FPGA" was published by Journal of Supercomputing (SUPE)

[Mar 2016] Our paper "Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms" was accepted by IEEE International Conference on Field Programmable Logic and Applications (FPL '16)