Curriculum Vitae

         

323.459.5614

poorvaag@usc.edu

1129 W 37th Street

Los Angeles 90007 CA

 

POORVA AGARWAL

 

EDUCATION

 

MS Electrical Engineering (VLSI Design)

University of Southern California, Los Angeles, CA

 

B.tech Electronics Engineering

Institute of Technology, BHU, Varanasi, India

Departmental Rank 1/50 , Institute Rank 2/450

 

 

 

First Semester

Fall 2008

 

GPA:9.03/10

2008

 

ACADEMIC PROJECT EXPERIENCE

 

Low Voltage Supply Design for Rad-Hard Integrated Circuits International Intern at University of Milan, Italy

  • Designed a low voltage supply of 1.8V using an external voltage supply of 3.3V in a 0.18µm CMOS technology for IC’s used in aerospace applications.
  • Used Cadence Design Framework, Spectre.

 

Single Frame Image Super-Resolution through Cluster-based Contourlet learning

Summer Fellow at Indian Academy of Sciences, Bangalore, India

  • Developed a code for super-resolving a single low resolution input image using a set of high resolution training images.

 

 

 

Summer 2007

 

 

 

 

 

Summer 2006

TECHNICAL SKILLS

 

Programming Languages: C, C++, Verilog, VHDL

Softwares: Microsoft Office, Matlab, Circuit Maker, Cadence Design Framework, Mentor Graphics Design Tool, Microsoft Excel

Operating Systems: Microsoft Windows 98/2K/XP, Linux

 

 

LEADERSHIP/ORGANISTIONS

 

President, Students’ Council, IT-BHU, India

Event Co-ordinator, Electronica, Opulence, IT-BHU, India

Media Co-ordinator, Technex, IT-BHU, India

Co-Editor, Spardha & Pulse, IT-BHU, India

 

 

 

2007-2008

2006-2007

2005-2006

2007-2008

HONORS & AWARDS

 

Best Women Volleyball Player, Sports Festival, IT-BHU, India

Winner, Britannia Heritage Quiz, Free Cruise trip to Singapore, Malaysia

Cyber LG Science Grandmaster, 4th Ranker in LG Science Olympiad, India

 

 

 

2005-2006

2000-2001

2000-2001

SOFT SKILLS

 

Languages: English, Hindi, French( UG Diploma )

 

 

 

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