Magic Tutorial2 : Hierarchical Layout
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- Make sure you have inverter layout
See Magic Tutorial - Inverter Layout or download
if you don't have.
- Execute magic program
See Fig 1.
- Get inverter cell
See Fig 2.
- ":getcell" command can be abbreviated as ":getc". So you can
type ":getc inverter" instread.
- If inverter cell is not located at the center, type "v".
- Array it (5,1)
See Fig 3.
":array 5 1"
- Another way to do
See Fig 4 and
make sure you selected inverter cell.
get width of cell by "b" - in command box, "Box height: 59, width: 22" will appear
":copy r 22"
repeat ":copy r 22" 3 more times by typing "." 3 times.
- Expand inverter cell(s)
See Fig 6.
select one of the instances of inverter. (type "s" or "f")
":expand" (type "x")
- When you have expanded the array, you can see that the paint in inverter cells
is displayed less brightly than in layout you have seen till now. This indicates
that inverter cell is not editable. (Currently, ring is editable cell.) Any attempt
to modify inverter cell is not acceptible at this level.
- To unexpand, type "X" or ":unexpand"
- Switching the edit cell
See Fig 7.
select one of the instances of inverter.
- Notice that the paint of inverter cell is brighter than one in
Fig 6. This means
that inverter cell is now editable.
- Any change in layout of inverter cell will affect the whole array.
- Change inverter size
See Fig 8.
- Increase pmos width to 18 lambda and nmos width to 6 lambda.
- All of instances of inverter should be affected by this change.
- Save files
- It will ask you whether to save inverter and ring layout.
Type "Enter" (default action) to save files.
- Put labels on top layout
See Fig 9,
Fig 10 and
select top cell(ring) and type ":edit"
"box(4,4)-> :paint m1"
label Vdd on the drawn m1 layer
repeat for GND, z1, z2, z3, z4, z5
- Any label (in, out) inside inverter instance cannot be seen from
the top cell. So you need to put labels on top cell.
- Base layer for top cell labels is required before labeling.
- Finish layout
See Fig 12.
- For correct operation of ring oscillator, draw nmos and metal
lines as shown in Fig 12.
- Run IRSIM or HSPICE simulation to check operation
Copyright Joong-Seok "Jay" Moon