VLSI CAD Tools - Setup Instructions and Tutorials

Bulletin

• New setup instructions and tutorial added (06/27/2006)
• Cadence Tutorials 1-4 updated (06/27/2006)

VLSI Tools Setup

• Setup Instructions (07/26/2006)

Magic

• Magic Homepage (at Digital) - Official Web for Magic, download, etc.
• Magic HomePage (at Berkeley) - Magic On-Line Manual & Tutorial
• Magic Handout (from Fall99 EE577A) (ps and pdf) - by Sangyun Kim
• Magic Tutorial-Inverter Layout - for the very beginners by Jay Moon
• Magic Tutorial2-Hierarchical Layout - by Jay Moon
• PPLOT - Magic Layout Plotting and its manpage - for plotting of your layout

IRSIM

IRSIM Manual PS format and PDF format
• IRSIM Tutorial (from Stanford) - by Ted Williams
• IRSIM Handout from Fall99 EE577A (ps and pdf) - by Sangyun Kim

• Digital Circuit Simulation Using HSPICE - by C. Kime at U of Wisconsin
• HSPICE Basics (from Stanford)
• HSPICE Handout from Fall99 EE577A (ps and pdf) - by Sangyun Kim
• Generation of hspice stimulus
• On-line HSpice manual available via the command ~ee577/bin/get_hspice_help which if you have a web browser window open will take it over and re-direct you to the on-line hspice manual.

• PowerView Help Page (at UNCC)
• Introduction to PowerView (ps and pdf) - by Prof. Puvvada
• PowerView Tutorial - Inverter Schematic & Symbol - for the analog entry in PV by Jay Moon

• Verilog for Behavioral Modeling (ps and pdf) - Lecture note of Verilog by Dr. Tzartzanis

CPU Examples
• Instruction Memory
• ALU
• Program Counter
• Insturuction Decode
• 8-bit Multiplexor
• Variable-size Register
• Register File
• CPU
• Top Level of CPU and IMem
Data Memory Examples
• Data Memory
• Test Module for Data Memory
• Verilog Behavioral Modeling Ref Manual (ps and pdf) - sampled from Cadence online manual
• Verilog-XL Tutorial (ps and pdf) - sampled from Cadence online manual
• A neat verilog tutorial that runs on PC's is available for free from a company called Aldec. (See Aldec's home page for more details.)

• Eqntott(Truth Table Generator from Boolean Equations)
• Eqntott Manual
• Example 1
• Example 2
• Espresso(Boolean Minimizer)
• Espresso Manual
• MPLA(Technology Independent PLA Generator)
• MPLA Manual

• Cadence Tutorial 1 - Cadence Online Documentation (07/26/2006)
• Cadence Tutorial 2 - Schematic Entry of a basic gate (07/26/2006)
• Cadence Tutorial 3 - Generation of hspice netlist from schematic (07/26/2006)
• Cadence Tutorial 4 - Schematic Entry of a Parameterized gate (07/26/2006)
• Cadence Tutorial 5 - Automatic Symbol Generation from Verilog and Schematic (01/20/2000)
• Cadence Tutorial 6 - Schematic Entry for 8-bit Adder (pdf) (01/20/2000)
• Cadence Tutorial 7 - Running Verilog-XL Simulation (pdf) (01/20/2000)
• Cadence Tutorial 8 - Simulating a Schematic with Verilog-XL (pdf) (01/20/2000)
• Cadence Tutorial 8 (extension) - Using simWaves in Integration Control (02/02/2000)
• Cadence Tutorial 9 - Comparing Verilog-XL Simulation (pdf) (01/20/2000)
• Cadence Tutorial 10 - Verilog-XL Simulation for Dymanic Logic (pdf) (01/20/2000)
• Cadence Tutorial11 - Integrating the design with testbench (02/02/2000)

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