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machine.h

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00001 // machine.h 
00002 //      Data structures for simulating the execution of user programs
00003 //      running on top of Nachos.
00004 //
00005 //      User programs are loaded into "mainMemory"; to Nachos,
00006 //      this looks just like an array of bytes.  Of course, the Nachos
00007 //      kernel is in memory too -- but as in most machines these days,
00008 //      the kernel is loaded into a separate memory region from user
00009 //      programs, and accesses to kernel memory are not translated or paged.
00010 //
00011 //      In Nachos, user programs are executed one instruction at a time, 
00012 //      by the simulator.  Each memory reference is translated, checked
00013 //      for errors, etc.
00014 //
00015 //  DO NOT CHANGE -- part of the machine emulation
00016 //
00017 // Copyright (c) 1992-1993 The Regents of the University of California.
00018 // All rights reserved.  See copyright.h for copyright notice and limitation 
00019 // of liability and disclaimer of warranty provisions.
00020 
00021 #ifndef MACHINE_H
00022 #define MACHINE_H
00023 
00024 #include "copyright.h"
00025 #include "utility.h"
00026 #include "translate.h"
00027 #include "disk.h"
00028 
00029 // Definitions related to the size, and format of user memory
00030 
00031 #define PageSize        SectorSize      // set the page size equal to
00032                                         // the disk sector size, for
00033                                         // simplicity
00034 
00035 #define NumPhysPages    32
00036 #define MemorySize      (NumPhysPages * PageSize)
00037 #define TLBSize         4               // if there is a TLB, make it small
00038 
00039 enum ExceptionType { NoException,           // Everything ok!
00040                      SyscallException,      // A program executed a system call.
00041                      PageFaultException,    // No valid translation found
00042                      ReadOnlyException,     // Write attempted to page marked 
00043                                             // "read-only"
00044                      BusErrorException,     // Translation resulted in an 
00045                                             // invalid physical address
00046                      AddressErrorException, // Unaligned reference or one that
00047                                             // was beyond the end of the
00048                                             // address space
00049                      OverflowException,     // Integer overflow in add or sub.
00050                      IllegalInstrException, // Unimplemented or reserved instr.
00051                      
00052                      NumExceptionTypes
00053 };
00054 
00055 // User program CPU state.  The full set of MIPS registers, plus a few
00056 // more because we need to be able to start/stop a user program between
00057 // any two instructions (thus we need to keep track of things like load
00058 // delay slots, etc.)
00059 
00060 #define StackReg        29      // User's stack pointer
00061 #define RetAddrReg      31      // Holds return address for procedure calls
00062 #define NumGPRegs       32      // 32 general purpose registers on MIPS
00063 #define HiReg           32      // Double register to hold multiply result
00064 #define LoReg           33
00065 #define PCReg           34      // Current program counter
00066 #define NextPCReg       35      // Next program counter (for branch delay) 
00067 #define PrevPCReg       36      // Previous program counter (for debugging)
00068 #define LoadReg         37      // The register target of a delayed load.
00069 #define LoadValueReg    38      // The value to be loaded by a delayed load.
00070 #define BadVAddrReg     39      // The failing virtual address on an exception
00071 
00072 #define NumTotalRegs    40
00073 
00074 // The following class defines an instruction, represented in both
00075 //      undecoded binary form
00076 //      decoded to identify
00077 //          operation to do
00078 //          registers to act on
00079 //          any immediate operand value
00080 
00081 class Instruction {
00082   public:
00083     void Decode();      // decode the binary representation of the instruction
00084 
00085     unsigned int value; // binary representation of the instruction
00086 
00087     char opCode;     // Type of instruction.  This is NOT the same as the
00088                      // opcode field from the instruction: see defs in mips.h
00089     char rs, rt, rd; // Three registers from instruction.
00090     int extra;       // Immediate or target or shamt field or offset.
00091                      // Immediates are sign-extended.
00092 };
00093 
00094 // The following class defines the simulated host workstation hardware, as 
00095 // seen by user programs -- the CPU registers, main memory, etc.
00096 // User programs shouldn't be able to tell that they are running on our 
00097 // simulator or on the real hardware, except 
00098 //      we don't support floating point instructions
00099 //      the system call interface to Nachos is not the same as UNIX 
00100 //        (10 system calls in Nachos vs. 200 in UNIX!)
00101 // If we were to implement more of the UNIX system calls, we ought to be
00102 // able to run Nachos on top of Nachos!
00103 //
00104 // The procedures in this class are defined in machine.cc, mipssim.cc, and
00105 // translate.cc.
00106 
00107 class Machine {
00108   public:
00109     Machine(bool debug);        // Initialize the simulation of the hardware
00110                                 // for running user programs
00111     ~Machine();                 // De-allocate the data structures
00112 
00113 // Routines callable by the Nachos kernel
00114     void Run();                 // Run a user program
00115 
00116     int ReadRegister(int num);  // read the contents of a CPU register
00117 
00118     void WriteRegister(int num, int value);
00119                                 // store a value into a CPU register
00120 
00121 
00122 // Routines internal to the machine simulation -- DO NOT call these 
00123 
00124     void OneInstruction(Instruction *instr);    
00125                                 // Run one instruction of a user program.
00126     void DelayedLoad(int nextReg, int nextVal);         
00127                                 // Do a pending delayed load (modifying a reg)
00128     
00129     bool ReadMem(int addr, int size, int* value);
00130     bool WriteMem(int addr, int size, int value);
00131                                 // Read or write 1, 2, or 4 bytes of virtual 
00132                                 // memory (at addr).  Return FALSE if a 
00133                                 // correct translation couldn't be found.
00134     
00135     ExceptionType Translate(int virtAddr, int* physAddr, int size,bool writing);
00136                                 // Translate an address, and check for 
00137                                 // alignment.  Set the use and dirty bits in 
00138                                 // the translation entry appropriately,
00139                                 // and return an exception code if the 
00140                                 // translation couldn't be completed.
00141 
00142     void RaiseException(ExceptionType which, int badVAddr);
00143                                 // Trap to the Nachos kernel, because of a
00144                                 // system call or other exception.  
00145 
00146     void Debugger();            // invoke the user program debugger
00147     void DumpState();           // print the user CPU and memory state 
00148 
00149 
00150 // Data structures -- all of these are accessible to Nachos kernel code.
00151 // "public" for convenience.
00152 //
00153 // Note that *all* communication between the user program and the kernel 
00154 // are in terms of these data structures.
00155 
00156     char *mainMemory;           // physical memory to store user program,
00157                                 // code and data, while executing
00158     int registers[NumTotalRegs]; // CPU registers, for executing user programs
00159 
00160 
00161 // NOTE: the hardware translation of virtual addresses in the user program
00162 // to physical addresses (relative to the beginning of "mainMemory")
00163 // can be controlled by one of:
00164 //      a traditional linear page table
00165 //      a software-loaded translation lookaside buffer (tlb) -- a cache of 
00166 //        mappings of virtual page #'s to physical page #'s
00167 //
00168 // If "tlb" is NULL, the linear page table is used
00169 // If "tlb" is non-NULL, the Nachos kernel is responsible for managing
00170 //      the contents of the TLB.  But the kernel can use any data structure
00171 //      it wants (eg, segmented paging) for handling TLB cache misses.
00172 // 
00173 // For simplicity, both the page table pointer and the TLB pointer are
00174 // public.  However, while there can be multiple page tables (one per address
00175 // space, stored in memory), there is only one TLB (implemented in hardware).
00176 // Thus the TLB pointer should be considered as *read-only*, although 
00177 // the contents of the TLB are free to be modified by the kernel software.
00178 
00179     TranslationEntry *tlb;              // this pointer should be considered 
00180                                         // "read-only" to Nachos kernel code
00181 
00182     TranslationEntry *pageTable;
00183     unsigned int pageTableSize;
00184 
00185   private:
00186     bool singleStep;            // drop back into the debugger after each
00187                                 // simulated instruction
00188     int runUntilTime;           // drop back into the debugger when simulated
00189                                 // time reaches this value
00190 };
00191 
00192 extern void ExceptionHandler(ExceptionType which);
00193                                 // Entry point into Nachos for handling
00194                                 // user system calls and exceptions
00195                                 // Defined in exception.cc
00196 
00197 
00198 // Routines for converting Words and Short Words to and from the
00199 // simulated machine's format of little endian.  If the host machine
00200 // is little endian (DEC and Intel), these end up being NOPs.
00201 //
00202 // What is stored in each format:
00203 //      host byte ordering:
00204 //         kernel data structures
00205 //         user registers
00206 //      simulated machine byte ordering:
00207 //         contents of main memory
00208 
00209 unsigned int WordToHost(unsigned int word);
00210 unsigned short ShortToHost(unsigned short shortword);
00211 unsigned int WordToMachine(unsigned int word);
00212 unsigned short ShortToMachine(unsigned short shortword);
00213 
00214 #endif // MACHINE_H

Generated on Mon Feb 10 09:54:45 2003 for nachos by doxygen1.2.14 written by Dimitri van Heesch, © 1997-2002
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